In recent years,RFID technology has affected the world significantly,from people's daily life to enterprises' economic efficiency,from social security to the social informatization process.It is a new automatic identification technology with the advantage of contactlessness,long reading range,lower operating cost and efficient recognizing ability.The research on UHF RFID reader has been developing rapidly in both theory and practice,but relatively few on single-chip realization.Characteristic works in the dissertation are summarized as follows:1.After the comparation of several popular wireless receiver architectures,the architecture analysis of UHF RFID reader is introduced with the consideration of EPCglobal C1G2 protocol.The spec of key modules in analog baseband of UHF RFID reader is given.2.In order to prevent the cut-off frequency offset in LPF caused by the manufacture error,a programmable channel-select filter is designed.The cut-off frequency can be controlled by MOS switch to vary in the range of 300kHz～1.3MHz.3.For the requirement of fully differential modules,a PGA with OPamp-resistance feedback architecture is designed.It reaches a gain range of 0dB to 48 dB with 2dB gain step,and the-3dB frequency keeps above 1.5MHz.4.In order to prevent the DC components of the input signal,a preamplifier stage with DC offset cancellation is designed.The fixed gain circuit provides a 10dB gain, and the cut-off frequency of the high pass filter in the DC offset cancellation loop is 5kHz.5.The design is implemented in IBM 0.18μm CMOS RF process.The post-simulation and experimental result is also given.